1. Field of the Invention
The present invention relates to a semiconductor fabrication processes. More particularly, the present invention relates to a method for fabricating asymmetric inner structure in contacts or trenches.
2. Description of the Prior Art
In the fabrication of semiconductor devices, trenches, via or contact holes are always needed to provide electrical paths for devices situated in different levels of an integrated circuit chip or for isolation purposes. For example, shallow trenches are formed in the substrate in the front-end process. Dielectric materials are then deposited to fill the trenches such that the devices are isolated with the trenches. This is also known in the art as shallow trench isolation (STI) process. Via or contact holes are typically formed in inter-layer dielectric films as parts of the interconnections.
Sometimes, the trenches or via/contact holes with an asymmetric inner structure on their bottom and sidewalls are needed. However, the prior art method for making such asymmetric structure in the trenches or via/contact holes is complex and not reliable. According to the prior art method, to form such asymmetric structure in the trenches or via/contact holes, a photoresist layer is coated on the substrate to mask a part of the trench or contact opening, then a thermal or etching process is carried out, followed by removal of the photoresist. The process window of the prior art photolithographic method is quite small for contact holes with a small critical dimension, and misalignment happens from time to time.
Accordingly, the primary object of the present invention is to provide a semiconductor fabrication process for making asymmetric structure in trenches or contact holes without the need of using photoresist or lithographic process.
According to the claimed invention, a method for making an asymmetric interior structure in a trench or contact hole of a substrate layer is provided. At least one trench or contact hole is formed in a substrate layer. The trench or contact opening comprises a first sidewall, second sidewall, and a bottom. A first dielectric layer is formed on the first sidewall, the second sidewall, and the bottom. A title angle ion implantation process is then carried out to dope ions into the first dielectric layer on the first sidewall and on the bottom, but not dope ions into the first dielectric layer on the second sidewall, thereby resulting in etching selectivity between the doped first dielectric layer on the first sidewall and on the bottom, and the non-doped first dielectric layer on the second sidewall. The doped first dielectric layer on the first sidewall and on the bottom is selectively etching away, thereby forming an asymmetric interior structure in the trench or contact hole.
Other objects, advantages, and novel features of the claimed invention will become more clearly and readily apparent from the following detailed description when taken in conjunction with the accompanying drawings.